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Multiplexing of Virtual ContainersСодержание книги Поиск на нашем сайте
The general principle of this multiplexing operation is fairly straight forward. Several VC12s, which should, hopefully, be synchronous with one another, are loaded into a larger Synchronous Container, which subsequently has its own POH added, thus creating a larger i.e. higher bit rate, VC. (See Figure 42.6.) In CEPT countries, this operation results in the creation of a VC4, which is large enough to accommodate up to 63 VC12s. Unfortunately, as discussed in Section 42.3, complications arise in this operation, because the network element that is performing this task, may not itself have created all the VC12s. (See Figure 42.9.) This leads to the possibility that not all the VCI2s are completely synchronous with one another or, more importantly, with the VC4 into which they are being loaded. The solution to this problem comes in two parts. Firstly, the internal structure of the VC4 has been purposely designed to allow each VC12 to run slightly faster, or slower, than the VC4 rate. This is done by designating certain bytes in the C4 as overflow bytes (one per VC12) to cope with a VC12 that is running too fast. On the other hand, when a VC12 is running slow, then occasionally, a VC12 byte can be repeated. Secondly, this (hopefully) infrequent change of phase of a VC12 relative to its VC4 is recorded by means of a pointer. A VC4 maintains one pointer for each of the VCI2s within its payload, and each pointer registers the offset in bytes between the first byte of the VC4 and the POH byte of a particular VC12. Each pointer is located in a pre-defined position within the VC4, hence once the VC4 POH has been located, it is a simple matter of counting bytes in order to locate each of the 63 pointers to the VC12s. (See Figure 42.10.) The trigger for a rephasing of a VC12 relative to its VC4 is when the fill of the VC12 input buffer (into which the incoming VC12 is written prior to loading into the VC4) exceeds a pre-determined threshold. At this point, what appears to be a fairly conventional justification occurs, with either an extra VC12 byte being loadedinto the VC4 (into the overflow position mentioned earlier) or, conversely, one byte being repeated. (See Figure 42.11.) Either way, the resulting change of phase of VC12 relative to VC4 is tracked by a corresponding change in pointer value. Because of the importance of pointer for locating low order VCs (VC12s) within high order VCs (VC4s), the combination of a low order VC plus its pointer is referred to as a Tributary Unit (TU). In this case, the combination of a VC12 plus its pointer constitutes aTU12.
Figure 42.10 Fixed location of VC12 pointers within a VC4
Figure 42.11 Pointer adjustment resulting from VC12#38 running slower than the VC4
1. Learn the following technical words and word-combinations: 42.3.1
42.4
42.4.1-42.4.2
Exercise 2 Read the text 42.3.1- 42.4.2
Exercise 3 Find the Russian equivalents for the following English technical word-combinations:
Exercise 4 Find the English equivalents for the following Russian words and word combinations
Exercise 5 Answer the following questions: 1. What is the solution adopted by the SDH? 2. When is it necessary to change the pointer value? 3. What is the most important mechanism of the SDH standard? What it enables us to do? 4. What helps us to achieve the traffic routing flexibility? 5. What do the three standards CCITT G.707/8/9 define? 6. What is the best way to appreciate the details of the SDH multiplexing standards? 7. What operation takes place at point B where the 2Mbit/s circuit meets the SDH network? 8.What is the next operation after having mapped the 2Mbit/s bit stream into the C12? 9.What enables the Path Overhead byte to do? 10. What is the general principle of multiplexing of Virtual Containers? 11. How many VC12s can be accommodated in VC4? 12. What complications may arise when accommodating up to 63 VCs into the VC4? 13. What is referred to as a Tributary unit (TU)? What does the TU consist of?
Exercise 6 a) Translate into Russian in writing part 42.4 paragraphs 1,2 (up to “At point B… “) b) Translate into Russian in writing part 42.4.1
Exercise 7 Make a short report on multiplexing of VCs (part 42.4.2)
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